基于动态浮动逆变换比较器的10位低功耗SAR ADC研究

Research on a 10-Bit Low-Power Successive Approximation Register (SAR) ADC with a Dynamic Floating Inversion Amplifier Comparator

摘要:

对于航天级CMOS图像传感器,模数转换器(ADC)是获得清晰红外图像的关键部件。针对国内航天工程这一应用需求,设计低功耗高效率的ADC是大规模CMOS图像传感器的主要指标,本文采用差分式输入结构和动态浮动逆变换前置放大比较器,设计了一种10位低功耗逐次逼近模数转换器。该ADC采用AMS 0.35μmCMOS工艺,电源电压为3.3V,采样速率为1MS/s。设计结果表明,ADC的SNDR=61.02dB,SFDR=73.26dB其有效位数达到 9.84bits,且功耗仅为260,版图单元面积240μm900μm。本设计在同等采样速率下具有更低功耗以及更优噪声表现,可应用于后续大规模CMOS图像传感器中。

Abstract:

For CMOS image sensors in aerospace applications, the Analog-to-Digital Converter (ADC) is a crucial component for obtaining clear infrared images. In response to the application needs of domestic aerospace engineering, designing an ADC with low power consumption and high efficiency is a primary objective for large-scale CMOS image sensors. This paper presents the design of a 10-bit low-power successive approximation ADC, utilizing a differential input structure and a dynamic floating inversion amplifier comparator. Fabricated using the AMS 0.35μm CMOS process, this ADC operates with a supply voltage of 3.3V and a sampling rate of 1MS/s. The design results demonstrate that the ADC achieves an SFDR (Signal-to-Noise and Distortion Ratio) of 73.26dB, an SNDR (Signal-to-Noise and Distortion Ratio) of 61.02dB, and an effective number of bits (ENOB) of 9.84bits, while consuming only 260μW of power. The layout unit area measures 240μm900μm. This design offers lower power consumption and superior noise performance at the same sampling rate, making it suitable for application in subsequent large-scale CMOS image sensors.