1000V 4H-SiC VDMOS结构设计与特性研究

Structure Design and Characteristics Research of 1000V 4H-SiC VDMOS

摘要:

设计并优化了一种基于4H-SiC的1000V垂直双扩散金属氧化物半导体场效应晶体管(VDMOS),在留有50%的裕度后,通过Silvaco仿真软件详细研究了器件各项参数与耐压特性之间的关系。经优化,器件的阈值电压为2.3V,击穿电压达1525V,相较于相同耐压条件下的Si基VDMOS,4H-SiC VDMOS的击穿电压提升了12%。此外,击穿时4H-SiC VDMOS表面电场分布相对均匀,最大值为3.4×10⁶V/cm。终端有效长度为15μm,约为Si基VDMOS的6%,总体面积减小了近1/10。并且4H-SiC VDMOS结构简单,与相同耐压条件下的Si基VDMOS相比,未增加额外的工艺步骤,易于实现。

Abstract:

This study focuses on designing and optimizing a 1000V vertical double-diffusion metal oxide semiconductor (VDMOS) field-effect transistor using 4H-SiC. Leveraging Silvaco simulation software, we comprehensively investigate the relationship between device parameters and withstand voltage characteristics, aiming for a 50% margin. Following optimization, the device achieves a threshold voltage of 2.3V, with the breakdown voltage reaching 1525V. Compared with an Si-based VDMOS under identical withstand voltage conditions, the breakdown voltage of the 4H-SiC VDMOS increases by 12%. Notably, the surface electric field distribution of the 4H-SiC VDMOS during breakdown remains relatively uniform, with a maximum value of 3.4×10⁶V/cm. The effective terminal length measures at 15μm, approximately 6% that of an Si-based VDMOS, with the overall area reducing by nearly 1/10. Furthermore, the structure is simpler compared to that of the 4H-SiC VDMOS under identical withstand voltage conditions. It involves no additional process steps, thus facilitating easy device fabrication.